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Commit 284db543 by Vasileios Amourgianos
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second test (not working)

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fifo64_test_2/fifo64_test.cache/wt/java_command_handlers.wdf 0 → 100644
version:1
70726f6a656374:706c616e5f61686561645f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6e657770726f6a656374:2d31:00:00
eof:625436222
fifo64_test_2/fifo64_test.cache/wt/project.wpc 0 → 100644
version:1
6d6f64655f636f756e7465727c4755494d6f6465:5
eof:
fifo64_test_2/fifo64_test.cache/wt/synthesis.wdf 0 → 100644
version:1
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d70617274:7863377a303230636c673438342d31:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6e616d65:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d746f70:64657369676e5f315f77726170706572:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d696e636c7564655f64697273:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d67656e65726963:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d766572696c6f675f646566696e65:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d636f6e737472736574:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d7365755f70726f74656374:64656661756c743a3a6e6f6e65:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d666c617474656e5f686965726172636879:64656661756c743a3a72656275696c74:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d67617465645f636c6f636b5f636f6e76657273696f6e:64656661756c743a3a6f6666:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d646972656374697665:64656661756c743a3a64656661756c74:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d72746c:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6c696e6b5f64637073:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d72746c5f6c6f61645f636f6e73747261696e7473:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d62756667:64656661756c743a3a3132:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d66616e6f75745f6c696d6974:64656661756c743a3a3130303030:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d73687265675f6d696e5f73697a65:64656661756c743a3a33:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6d6f6465:64656661756c743a3a64656661756c74:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d66736d5f65787472616374696f6e:64656661756c743a3a6175746f:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d6b6565705f6571756976616c656e745f726567697374657273:64656661756c743a3a5b6e6f745f7370656369666965645d:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d7265736f757263655f73686172696e67:64656661756c743a3a6175746f:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d636173636164655f647370:64656661756c743a3a6175746f:00:00
73796e746865736973:73796e7468657369735c636f6d6d616e645f6c696e655f6f7074696f6e73:2d636f6e74726f6c5f7365745f6f70745f7468726573686f6c64:64656661756c743a3a6175746f:00:00
73796e746865736973:73796e7468657369735c7573616765:656c6170736564:30303a30353a343173:00:00
73796e746865736973:73796e7468657369735c7573616765:6d656d6f72795f7065616b:313031332e3532334d42:00:00
73796e746865736973:73796e7468657369735c7573616765:6d656d6f72795f6761696e:3730362e3934394d42:00:00
eof:2881662652
fifo64_test_2/fifo64_test.cache/wt/synthesis_details.wdf 0 → 100644
version:1
73796e746865736973:73796e7468657369735c7573616765:686c735f6970:31:00:00
eof:1494966798
fifo64_test_2/fifo64_test.cache/wt/webtalk_pa.xml 0 → 100644
<?xml version="1.0" encoding="UTF-8" ?>
<document>
<!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application name="pa" timeStamp="Tue Nov 15 02:10:18 2016">
<section name="Project Information" visible="false">
<property name="ProjectID" value="ab91587aa91141e586a2870d34164327" type="ProjectID"/>
<property name="ProjectIteration" value="16" type="ProjectIteration"/>
</section>
<section name="PlanAhead Usage" visible="true">
<item name="Project Data">
<property name="SrcSetCount" value="1" type="SrcSetCount"/>
<property name="ConstraintSetCount" value="1" type="ConstraintSetCount"/>
<property name="DesignMode" value="RTL" type="DesignMode"/>
<property name="SynthesisStrategy" value="Vivado Synthesis Defaults" type="SynthesisStrategy"/>
<property name="ImplStrategy" value="Vivado Implementation Defaults" type="ImplStrategy"/>
</item>
<item name="Java Command Handlers">
<property name="NewProject" value="-1" type="JavaHandler"/>
</item>
<item name="Other">
<property name="GuiMode" value="73" type="GuiMode"/>
<property name="BatchMode" value="0" type="BatchMode"/>
<property name="TclMode" value="59" type="TclMode"/>
</item>
</section>
</application>
</document>
fifo64_test_2/fifo64_test.hw/fifo64_test.lpr 0 → 100644
<?xml version="1.0" encoding="UTF-8"?>
<!-- Product Version: Vivado v2015.3 (64-bit) -->
<!-- -->
<!-- Copyright 1986-2015 Xilinx, Inc. All Rights Reserved. -->
<labtools version="1" minor="0"/>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_1.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/NetworkInterface/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/NetworkInterface/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_10.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_11.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_12.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_13.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_14.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_15.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_2.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/NetworkInterface/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/NetworkInterface/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_3.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/NetworkInterface/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/NetworkInterface/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_4.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/NetworkInterface/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/NetworkInterface/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_5.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_6.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_7.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_8.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/.jobs/vrs_config_9.xml 0 → 100644
<?xml version="1.0"?>
<Runs Version="1" Minor="0">
<Run Id="synth_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
<Run Id="impl_1" LaunchDir="C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">
<Parent Id="synth_1"/>
</Run>
</Runs>
fifo64_test_2/fifo64_test.runs/impl_1/.init_design.begin.rst 0 → 100644
<?xml version="1.0"?>
<ProcessHandle Version="1" Minor="0">
<Process Command=".planAhead." Owner="billy" Host="BILLY-PC" Pid="556">
</Process>
</ProcessHandle>
fifo64_test_2/fifo64_test.runs/impl_1/.opt_design.begin.rst 0 → 100644
<?xml version="1.0"?>
<ProcessHandle Version="1" Minor="0">
<Process Command=".planAhead." Owner="billy" Host="BILLY-PC" Pid="556">
</Process>
</ProcessHandle>
fifo64_test_2/fifo64_test.runs/impl_1/.place_design.begin.rst 0 → 100644
<?xml version="1.0"?>
<ProcessHandle Version="1" Minor="0">
<Process Command=".planAhead." Owner="billy" Host="BILLY-PC" Pid="556">
</Process>
</ProcessHandle>
fifo64_test_2/fifo64_test.runs/impl_1/.route_design.begin.rst 0 → 100644
<?xml version="1.0"?>
<ProcessHandle Version="1" Minor="0">
<Process Command=".planAhead." Owner="billy" Host="BILLY-PC" Pid="556">
</Process>
</ProcessHandle>
fifo64_test_2/fifo64_test.runs/impl_1/.vivado.begin.rst 0 → 100644
<?xml version="1.0"?>
<ProcessHandle Version="1" Minor="0">
<Process Command="vivado.bat" Owner="billy" Host="BILLY-PC" Pid="4420">
</Process>
</ProcessHandle>
fifo64_test_2/fifo64_test.runs/impl_1/.write_bitstream.begin.rst 0 → 100644
<?xml version="1.0"?>
<ProcessHandle Version="1" Minor="0">
<Process Command=".planAhead." Owner="billy" Host="BILLY-PC" Pid="556">
</Process>
</ProcessHandle>
fifo64_test_2/fifo64_test.runs/impl_1/ISEWrap.js 0 → 100644
//
// Vivado(TM)
// ISEWrap.js: Vivado Runs Script for WSH 5.1/5.6
// Copyright 1986-1999, 2001-2013,2015 Xilinx, Inc. All Rights Reserved.
//
// GLOBAL VARIABLES
var ISEShell = new ActiveXObject( "WScript.Shell" );
var ISEFileSys = new ActiveXObject( "Scripting.FileSystemObject" );
var ISERunDir = "";
var ISELogFile = "runme.log";
var ISELogFileStr = null;
var ISELogEcho = true;
var ISEOldVersionWSH = false;
// BOOTSTRAP
ISEInit();
//
// ISE FUNCTIONS
//
function ISEInit() {
// 1. RUN DIR setup
var ISEScrFP = WScript.ScriptFullName;
var ISEScrN = WScript.ScriptName;
ISERunDir =
ISEScrFP.substr( 0, ISEScrFP.length - ISEScrN.length - 1 );
// 2. LOG file setup
ISELogFileStr = ISEOpenFile( ISELogFile );
// 3. LOG echo?
var ISEScriptArgs = WScript.Arguments;
for ( var loopi=0; loopi<ISEScriptArgs.length; loopi++ ) {
if ( ISEScriptArgs(loopi) == "-quiet" ) {
ISELogEcho = false;
break;
}
}
// 4. WSH version check
var ISEOptimalVersionWSH = 5.6;
var ISECurrentVersionWSH = WScript.Version;
if ( ISECurrentVersionWSH < ISEOptimalVersionWSH ) {
ISEStdErr( "" );
ISEStdErr( "Warning: ExploreAhead works best with Microsoft WSH " +
ISEOptimalVersionWSH + " or higher. Downloads" );
ISEStdErr( " for upgrading your Windows Scripting Host can be found here: " );
ISEStdErr( " http://msdn.microsoft.com/downloads/list/webdev.asp" );
ISEStdErr( "" );
ISEOldVersionWSH = true;
}
}
function ISEStep( ISEProg, ISEArgs ) {
// CHECK for a STOP FILE
if ( ISEFileSys.FileExists(ISERunDir + "/.stop.rst") ) {
ISEStdErr( "" );
ISEStdErr( "*** Halting run - EA reset detected ***" );
ISEStdErr( "" );
WScript.Quit( 1 );
}
// WRITE STEP HEADER to LOG
ISEStdOut( "" );
ISEStdOut( "*** Running " + ISEProg );
ISEStdOut( " with args " + ISEArgs );
ISEStdOut( "" );
// LAUNCH!
var ISEExitCode = ISEExec( ISEProg, ISEArgs );
if ( ISEExitCode != 0 ) {
WScript.Quit( ISEExitCode );
}
}
function ISEExec( ISEProg, ISEArgs ) {
var ISEStep = ISEProg;
if (ISEProg == "realTimeFpga" || ISEProg == "planAhead" || ISEProg == "vivado") {
ISEProg += ".bat";
}
var ISECmdLine = ISEProg + " " + ISEArgs;
var ISEExitCode = 1;
if ( ISEOldVersionWSH ) { // WSH 5.1
// BEGIN file creation
ISETouchFile( ISEStep, "begin" );
// LAUNCH!
ISELogFileStr.Close();
ISECmdLine =
"%comspec% /c " + ISECmdLine + " >> " + ISELogFile + " 2>&1";
ISEExitCode = ISEShell.Run( ISECmdLine, 0, true );
ISELogFileStr = ISEOpenFile( ISELogFile );
} else { // WSH 5.6
// LAUNCH!
ISEShell.CurrentDirectory = ISERunDir;
// Redirect STDERR to STDOUT
ISECmdLine = "%comspec% /c " + ISECmdLine + " 2>&1";
var ISEProcess = ISEShell.Exec( ISECmdLine );
// BEGIN file creation
var ISENetwork = WScript.CreateObject( "WScript.Network" );
var ISEHost = ISENetwork.ComputerName;
var ISEUser = ISENetwork.UserName;
var ISEPid = ISEProcess.ProcessID;
var ISEBeginFile = ISEOpenFile( "." + ISEStep + ".begin.rst" );
ISEBeginFile.WriteLine( "<?xml version=\"1.0\"?>" );
ISEBeginFile.WriteLine( "<ProcessHandle Version=\"1\" Minor=\"0\">" );
ISEBeginFile.WriteLine( " <Process Command=\"" + ISEProg +
"\" Owner=\"" + ISEUser +
"\" Host=\"" + ISEHost +
"\" Pid=\"" + ISEPid +
"\">" );
ISEBeginFile.WriteLine( " </Process>" );
ISEBeginFile.WriteLine( "</ProcessHandle>" );
ISEBeginFile.Close();
var ISEOutStr = ISEProcess.StdOut;
var ISEErrStr = ISEProcess.StdErr;
// WAIT for ISEStep to finish
while ( ISEProcess.Status == 0 ) {
// dump stdout then stderr - feels a little arbitrary
while ( !ISEOutStr.AtEndOfStream ) {
ISEStdOut( ISEOutStr.ReadLine() );
}
WScript.Sleep( 100 );
}
ISEExitCode = ISEProcess.ExitCode;
}
ISELogFileStr.Close();
// END/ERROR file creation
if ( ISEExitCode != 0 ) {
ISETouchFile( ISEStep, "error" );
} else {
ISETouchFile( ISEStep, "end" );
}
return ISEExitCode;
}
//
// UTILITIES
//
function ISEStdOut( ISELine ) {
ISELogFileStr.WriteLine( ISELine );
if ( ISELogEcho ) {
WScript.StdOut.WriteLine( ISELine );
}
}
function ISEStdErr( ISELine ) {
ISELogFileStr.WriteLine( ISELine );
if ( ISELogEcho ) {
WScript.StdErr.WriteLine( ISELine );
}
}
function ISETouchFile( ISERoot, ISEStatus ) {
var ISETFile =
ISEOpenFile( "." + ISERoot + "." + ISEStatus + ".rst" );
ISETFile.Close();
}
function ISEOpenFile( ISEFilename ) {
// This function has been updated to deal with a problem seen in CR #870871.
// In that case the user runs a script that runs impl_1, and then turns around
// and runs impl_1 -to_step write_bitstream. That second run takes place in
// the same directory, which means we may hit some of the same files, and in
// particular, we will open the runme.log file. Even though this script closes
// the file (now), we see cases where a subsequent attempt to open the file
// fails. Perhaps the OS is slow to release the lock, or the disk comes into
// play? In any case, we try to work around this by first waiting if the file
// is already there for an arbitrary 5 seconds. Then we use a try-catch block
// and try to open the file 10 times with a one second delay after each attempt.
// Again, 10 is arbitrary. But these seem to stop the hang in CR #870871.
// If there is an unrecognized exception when trying to open the file, we output
// an error message and write details to an exception.log file.
var ISEFullPath = ISERunDir + "/" + ISEFilename;
if (ISEFileSys.FileExists(ISEFullPath)) {
// File is already there. This could be a problem. Wait in case it is still in use.
WScript.Sleep(5000);
}
var i;
for (i = 0; i < 10; ++i) {
try {
return ISEFileSys.OpenTextFile(ISEFullPath, 8, true);
} catch (exception) {
var error_code = exception.number & 0xFFFF; // The other bits are a facility code.
if (error_code == 52) { // 52 is bad file name or number.
// Wait a second and try again.
WScript.Sleep(1000);
continue;
} else {
WScript.StdErr.WriteLine("ERROR: Exception caught trying to open file " + ISEFullPath);
var exceptionFilePath = ISERunDir + "/exception.log";
if (!ISEFileSys.FileExists(exceptionFilePath)) {
WScript.StdErr.WriteLine("See file " + exceptionFilePath + " for details.");
var exceptionFile = ISEFileSys.OpenTextFile(exceptionFilePath, 8, true);
exceptionFile.WriteLine("ERROR: Exception caught trying to open file " + ISEFullPath);
exceptionFile.WriteLine("\tException name: " + exception.name);
exceptionFile.WriteLine("\tException error code: " + error_code);
exceptionFile.WriteLine("\tException message: " + exception.message);
exceptionFile.Close();
}
throw exception;
}
}
}
// If we reached this point, we failed to open the file after 10 attempts.
// We need to error out.
WScript.StdErr.WriteLine("ERROR: Failed to open file " + ISEFullPath);
WScript.Quit(1);
}
fifo64_test_2/fifo64_test.runs/impl_1/ISEWrap.sh 0 → 100644
#!/bin/sh
#
# Vivado(TM)
# ISEWrap.sh: Vivado Runs Script for UNIX
# Copyright 1986-1999, 2001-2013 Xilinx, Inc. All Rights Reserved.
#
HD_LOG=$1
shift
# CHECK for a STOP FILE
if [ -f .stop.rst ]
then
echo "" >> $HD_LOG
echo "*** Halting run - EA reset detected ***" >> $HD_LOG
echo "" >> $HD_LOG
exit 1
fi
ISE_STEP=$1
shift
# WRITE STEP HEADER to LOG
echo "" >> $HD_LOG
echo "*** Running $ISE_STEP" >> $HD_LOG
echo " with args $@" >> $HD_LOG
echo "" >> $HD_LOG
# LAUNCH!
$ISE_STEP "$@" >> $HD_LOG 2>&1 &
# BEGIN file creation
ISE_PID=$!
if [ X != X$HOSTNAME ]
then
ISE_HOST=$HOSTNAME #bash
else
ISE_HOST=$HOST #csh
fi
ISE_USER=$USER
ISE_BEGINFILE=.$ISE_STEP.begin.rst
/bin/touch $ISE_BEGINFILE
echo "<?xml version=\"1.0\"?>" >> $ISE_BEGINFILE
echo "<ProcessHandle Version=\"1\" Minor=\"0\">" >> $ISE_BEGINFILE
echo " <Process Command=\"$ISE_STEP\" Owner=\"$ISE_USER\" Host=\"$ISE_HOST\" Pid=\"$ISE_PID\">" >> $ISE_BEGINFILE
echo " </Process>" >> $ISE_BEGINFILE
echo "</ProcessHandle>" >> $ISE_BEGINFILE
# WAIT for ISEStep to finish
wait $ISE_PID
# END/ERROR file creation
RETVAL=$?
if [ $RETVAL -eq 0 ]
then
/bin/touch .$ISE_STEP.end.rst
else
/bin/touch .$ISE_STEP.error.rst
fi
exit $RETVAL
fifo64_test_2/fifo64_test.runs/impl_1/design_1_wrapper.tcl 0 → 100644
proc start_step { step } {
set stopFile ".stop.rst"
if {[file isfile .stop.rst]} {
puts ""
puts "*** Halting run - EA reset detected ***"
puts ""
puts ""
return -code error
}
set beginFile ".$step.begin.rst"
set platform "$::tcl_platform(platform)"
set user "$::tcl_platform(user)"
set pid [pid]
set host ""
if { [string equal $platform unix] } {
if { [info exist ::env(HOSTNAME)] } {
set host $::env(HOSTNAME)
}
} else {
if { [info exist ::env(COMPUTERNAME)] } {
set host $::env(COMPUTERNAME)
}
}
set ch [open $beginFile w]
puts $ch "<?xml version=\"1.0\"?>"
puts $ch "<ProcessHandle Version=\"1\" Minor=\"0\">"
puts $ch " <Process Command=\".planAhead.\" Owner=\"$user\" Host=\"$host\" Pid=\"$pid\">"
puts $ch " </Process>"
puts $ch "</ProcessHandle>"
close $ch
}
proc end_step { step } {
set endFile ".$step.end.rst"
set ch [open $endFile w]
close $ch
}
proc step_failed { step } {
set endFile ".$step.error.rst"
set ch [open $endFile w]
close $ch
}
set_msg_config -id {HDL 9-1061} -limit 100000
set_msg_config -id {HDL 9-1654} -limit 100000
start_step init_design
set rc [catch {
create_msg_db init_design.pb
create_project -in_memory -part xc7z020clg484-1
set_property board_part em.avnet.com:zed:part0:1.3 [current_project]
set_property design_mode GateLvl [current_fileset]
set_property webtalk.parent_dir C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.cache/wt [current_project]
set_property parent.project_path C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.xpr [current_project]
set_property ip_repo_paths {
c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.cache/ip
C:/Users/billy/Documents/FifoTest/test1
C:/Users/billy/Documents/NetworkInterface/ni_RxMsgController
C:/Users/billy/Documents/NetworkInterface/ni_TxMsgController
} [current_project]
set_property ip_output_repo c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.cache/ip [current_project]
add_files -quiet C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1/design_1_wrapper.dcp
read_xdc -ref design_1_processing_system7_0_0 -cells inst c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0.xdc
set_property processing_order EARLY [get_files c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0.xdc]
read_xdc -prop_thru_buffers -ref design_1_proc_sys_reset_0_0 c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_proc_sys_reset_0_0/design_1_proc_sys_reset_0_0_board.xdc
set_property processing_order EARLY [get_files c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_proc_sys_reset_0_0/design_1_proc_sys_reset_0_0_board.xdc]
read_xdc -ref design_1_proc_sys_reset_0_0 c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_proc_sys_reset_0_0/design_1_proc_sys_reset_0_0.xdc
set_property processing_order EARLY [get_files c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_proc_sys_reset_0_0/design_1_proc_sys_reset_0_0.xdc]
read_xdc -ref design_1_auto_ds_0 -cells inst c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_ds_0/design_1_auto_ds_0_clocks.xdc
set_property processing_order LATE [get_files c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_ds_0/design_1_auto_ds_0_clocks.xdc]
read_xdc -ref design_1_auto_ds_1 -cells inst c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_ds_1/design_1_auto_ds_1_clocks.xdc
set_property processing_order LATE [get_files c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_ds_1/design_1_auto_ds_1_clocks.xdc]
read_xdc -ref design_1_auto_us_0 -cells inst c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_us_0/design_1_auto_us_0_clocks.xdc
set_property processing_order LATE [get_files c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_us_0/design_1_auto_us_0_clocks.xdc]
link_design -top design_1_wrapper -part xc7z020clg484-1
close_msg_db -file init_design.pb
} RESULT]
if {$rc} {
step_failed init_design
return -code error $RESULT
} else {
end_step init_design
}
start_step opt_design
set rc [catch {
create_msg_db opt_design.pb
catch {write_debug_probes -quiet -force debug_nets}
opt_design
write_checkpoint -force design_1_wrapper_opt.dcp
report_drc -file design_1_wrapper_drc_opted.rpt
close_msg_db -file opt_design.pb
} RESULT]
if {$rc} {
step_failed opt_design
return -code error $RESULT
} else {
end_step opt_design
}
start_step place_design
set rc [catch {
create_msg_db place_design.pb
catch {write_hwdef -file design_1_wrapper.hwdef}
place_design
write_checkpoint -force design_1_wrapper_placed.dcp
report_io -file design_1_wrapper_io_placed.rpt
report_utilization -file design_1_wrapper_utilization_placed.rpt -pb design_1_wrapper_utilization_placed.pb
report_control_sets -verbose -file design_1_wrapper_control_sets_placed.rpt
close_msg_db -file place_design.pb
} RESULT]
if {$rc} {
step_failed place_design
return -code error $RESULT
} else {
end_step place_design
}
start_step route_design
set rc [catch {
create_msg_db route_design.pb
route_design
write_checkpoint -force design_1_wrapper_routed.dcp
report_drc -file design_1_wrapper_drc_routed.rpt -pb design_1_wrapper_drc_routed.pb
report_timing_summary -warn_on_violation -max_paths 10 -file design_1_wrapper_timing_summary_routed.rpt -rpx design_1_wrapper_timing_summary_routed.rpx
report_power -file design_1_wrapper_power_routed.rpt -pb design_1_wrapper_power_summary_routed.pb
report_route_status -file design_1_wrapper_route_status.rpt -pb design_1_wrapper_route_status.pb
report_clock_utilization -file design_1_wrapper_clock_utilization_routed.rpt
close_msg_db -file route_design.pb
} RESULT]
if {$rc} {
step_failed route_design
return -code error $RESULT
} else {
end_step route_design
}
start_step write_bitstream
set rc [catch {
create_msg_db write_bitstream.pb
catch { write_mem_info -force design_1_wrapper.mmi }
write_bitstream -force design_1_wrapper.bit
catch { write_sysdef -hwdef design_1_wrapper.hwdef -bitfile design_1_wrapper.bit -meminfo design_1_wrapper.mmi -file design_1_wrapper.sysdef }
close_msg_db -file write_bitstream.pb
} RESULT]
if {$rc} {
step_failed write_bitstream
return -code error $RESULT
} else {
end_step write_bitstream
}
fifo64_test_2/fifo64_test.runs/impl_1/design_1_wrapper.vdi 0 → 100644
This diff could not be displayed because it is too large.
fifo64_test_2/fifo64_test.runs/impl_1/design_1_wrapper_control_sets_placed.rpt 0 → 100644
This diff could not be displayed because it is too large.
fifo64_test_2/fifo64_test.runs/impl_1/design_1_wrapper_io_placed.rpt 0 → 100644
This diff could not be displayed because it is too large.
fifo64_test_2/fifo64_test.runs/impl_1/design_1_wrapper_route_status.rpt 0 → 100644
Design Route Status
: # nets :
------------------------------------------- : ----------- :
# of logical nets.......................... : 13586 :
# of nets not needing routing.......... : 7269 :
# of internally routed nets........ : 2437 :
# of nets with no loads............ : 4832 :
# of routable nets..................... : 6317 :
# of fully routed nets............. : 6317 :
# of nets with routing errors.......... : 0 :
------------------------------------------- : ----------- :
fifo64_test_2/fifo64_test.runs/impl_1/design_1_wrapper_timing_summary_routed.rpt 0 → 100644
This diff could not be displayed because it is too large.
fifo64_test_2/fifo64_test.runs/impl_1/gen_run.xml 0 → 100644
<?xml version="1.0" encoding="UTF-8"?>
<GenRun Id="impl_1" LaunchPart="xc7z020clg484-1" LaunchTime="1479167805">
<File Type="OPT-DCP" Name="design_1_wrapper_opt.dcp"/>
<File Type="RUN-CONSTRS" Name="$PDATADIR/runs/impl_1/constrs_in.xml"/>
<File Type="RUN-SRCS" Name="$PDATADIR/runs/impl_1/sources.xml"/>
<File Type="ROUTE-DCP" Name="design_1_wrapper_routed.dcp"/>
<File Type="PA-TCL" Name="design_1_wrapper.tcl"/>
<File Type="RUN-STRAT" Name="$PDATADIR/runs/impl_1/impl_1.psg"/>
<File Type="OPT-DRC" Name="design_1_wrapper_drc_opted.rpt"/>
<File Type="INIT-TIMING" Name="design_1_wrapper_timing_summary_init.rpt"/>
<File Type="OPT-TIMING" Name="design_1_wrapper_timing_summary_opted.rpt"/>
<File Type="OPT-HWDEF" Name="design_1_wrapper.hwdef"/>
<File Type="PWROPT-DCP" Name="design_1_wrapper_pwropt.dcp"/>
<File Type="PWROPT-DRC" Name="design_1_wrapper_drc_pwropted.rpt"/>
<File Type="PWROPT-TIMING" Name="design_1_wrapper_timing_summary_pwropted.rpt"/>
<File Type="PLACE-DCP" Name="design_1_wrapper_placed.dcp"/>
<File Type="PLACE-IO" Name="design_1_wrapper_io_placed.rpt"/>
<File Type="PLACE-CLK" Name="design_1_wrapper_clock_utilization_placed.rpt"/>
<File Type="PLACE-UTIL" Name="design_1_wrapper_utilization_placed.rpt"/>
<File Type="PLACE-UTIL-PB" Name="design_1_wrapper_utilization_placed.pb"/>
<File Type="PLACE-CTRL" Name="design_1_wrapper_control_sets_placed.rpt"/>
<File Type="PLACE-SIMILARITY" Name="design_1_wrapper_incremental_reuse_placed.rpt"/>
<File Type="PLACE-PRE-SIMILARITY" Name="design_1_wrapper_incremental_reuse_pre_placed.rpt"/>
<File Type="PLACE-TIMING" Name="design_1_wrapper_timing_summary_placed.rpt"/>
<File Type="POSTPLACE-PWROPT-DCP" Name="design_1_wrapper_postplace_pwropt.dcp"/>
<File Type="POSTPLACE-PWROPT-TIMING" Name="design_1_wrapper_timing_summary_postplace_pwropted.rpt"/>
<File Type="PHYSOPT-DCP" Name="design_1_wrapper_physopt.dcp"/>
<File Type="RDI-RDI" Name="design_1_wrapper.vdi"/>
<File Type="PHYSOPT-DRC" Name="design_1_wrapper_drc_physopted.rpt"/>
<File Type="PHYSOPT-TIMING" Name="design_1_wrapper_timing_summary_physopted.rpt"/>
<File Type="ROUTE-DRC" Name="design_1_wrapper_drc_routed.rpt"/>
<File Type="ROUTE-DRC-PB" Name="design_1_wrapper_drc_routed.pb"/>
<File Type="ROUTE-PWR" Name="design_1_wrapper_power_routed.rpt"/>
<File Type="ROUTE-PWR-SUM" Name="design_1_wrapper_power_summary_routed.pb"/>
<File Type="ROUTE-STATUS" Name="design_1_wrapper_route_status.rpt"/>
<File Type="ROUTE-STATUS-PB" Name="design_1_wrapper_route_status.pb"/>
<File Type="ROUTE-TIMINGSUMMARY" Name="design_1_wrapper_timing_summary_routed.rpt"/>
<File Type="ROUTE-TIMING-PB" Name="design_1_wrapper_timing_summary_routed.pb"/>
<File Type="ROUTE-TIMING-RPX" Name="design_1_wrapper_timing_summary_routed.rpx"/>
<File Type="ROUTE-SIMILARITY" Name="design_1_wrapper_incremental_reuse_routed.rpt"/>
<File Type="ROUTE-CLK" Name="design_1_wrapper_clock_utilization_routed.rpt"/>
<File Type="POSTROUTE-PHYSOPT-DCP" Name="design_1_wrapper_postroute_physopt.dcp"/>
<File Type="POSTROUTE-PHYSOPT-TIMING" Name="design_1_wrapper_timing_summary_postroute_physopted.rpt"/>
<File Type="POSTROUTE-PHYSOPT-TIMING-PB" Name="design_1_wrapper_timing_summary_postroute_physopted.pb"/>
<File Type="POSTROUTE-PHYSOPT-TIMING-RPX" Name="design_1_wrapper_timing_summary_postroute_physopted.rpx"/>
<File Type="BG-BIT" Name="design_1_wrapper.bit"/>
<File Type="BG-BIN" Name="design_1_wrapper.bin"/>
<File Type="BITSTR-MSK" Name="design_1_wrapper.msk"/>
<File Type="BITSTR-RBT" Name="design_1_wrapper.rbt"/>
<File Type="BITSTR-NKY" Name="design_1_wrapper.nky"/>
<File Type="BITSTR-BMM" Name="design_1_wrapper_bd.bmm"/>
<File Type="BITSTR-MMI" Name="design_1_wrapper.mmi"/>
<File Type="BITSTR-SYSDEF" Name="design_1_wrapper.sysdef"/>
<File Type="BG-BGN" Name="design_1_wrapper.bgn"/>
<File Type="BG-DRC" Name="design_1_wrapper.drc"/>
<File Type="WBT-USG" Name="usage_statistics_webtalk.html"/>
<FileSet Name="sources" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1">
<Filter Type="Srcs"/>
<File Path="$PSRCDIR/sources_1/bd/design_1/design_1.bd">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/bd/design_1/hdl/design_1_wrapper.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/bd/design_1/ip/design_1_testIP_0_0/design_1_testIP_0_0.upgrade_log"/>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="design_1_wrapper"/>
<Option Name="TopAutoSet" Val="TRUE"/>
</Config>
</FileSet>
<FileSet Name="constrs_in" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1">
<Filter Type="Constrs"/>
<Config>
<Option Name="ConstrsType" Val="XDC"/>
</Config>
</FileSet>
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2015"/>
<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>
<Step Id="place_design"/>
<Step Id="post_place_power_opt_design"/>
<Step Id="phys_opt_design"/>
<Step Id="route_design"/>
<Step Id="post_route_phys_opt_design"/>
<Step Id="write_bitstream"/>
</Strategy>
</GenRun>
fifo64_test_2/fifo64_test.runs/impl_1/htr.txt 0 → 100644
REM
REM Vivado(TM)
REM htr.txt: a Vivado-generated description of how-to-repeat the
REM the basic steps of a run. Note that runme.bat/sh needs
REM to be invoked for Vivado to track run status.
REM Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
REM
vivado -log design_1_wrapper.vdi -applog -m64 -messageDb vivado.pb -mode batch -source design_1_wrapper.tcl -notrace
fifo64_test_2/fifo64_test.runs/impl_1/project.wdf 0 → 100644
version:1
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:737263736574636f756e74:33:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:636f6e73747261696e74736574636f756e74:30:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:64657369676e6d6f6465:52544c:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:707270726f6a656374:66616c7365:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:7265636f6e666967706172746974696f6e636f756e74:30:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:7265636f6e6669676d6f64756c65636f756e74:30:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:686470726f6a656374:66616c7365:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:706172746974696f6e636f756e74:30:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:73796e7468657369737374726174656779:56697661646f2053796e7468657369732044656661756c7473:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:696d706c7374726174656779:56697661646f20496d706c656d656e746174696f6e2044656661756c7473:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:63757272656e7473796e74686573697372756e:73796e74685f31:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:63757272656e74696d706c72756e:696d706c5f31:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:746f74616c73796e74686573697372756e73:31:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:746f74616c696d706c72756e73:31:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:626f617264:5a6564426f617264205a796e71204576616c756174696f6e20616e6420446576656c6f706d656e74204b6974:00:00
70726f6a656374:76697661646f5f75736167655c70726f6a6563745f64617461:636f72655f636f6e7461696e6572:66616c7365:00:00
70726f6a656374:69705f636f72655f636f6e7461696e65725c6178695f6477696474685f636f6e7665727465725f76325f315f365c64657369676e5f315f6175746f5f64735f30:636f72655f636f6e7461696e6572:66616c7365:00:00
70726f6a656374:69705f636f72655f636f6e7461696e65725c6178695f6477696474685f636f6e7665727465725f76325f315f365c64657369676e5f315f6175746f5f64735f31:636f72655f636f6e7461696e6572:66616c7365:00:00
70726f6a656374:69705f636f72655f636f6e7461696e65725c6178695f70726f746f636f6c5f636f6e7665727465725f76325f315f365c64657369676e5f315f6175746f5f70635f30:636f72655f636f6e7461696e6572:66616c7365:00:00
70726f6a656374:69705f636f72655f636f6e7461696e65725c6178695f70726f746f636f6c5f636f6e7665727465725f76325f315f365c64657369676e5f315f6175746f5f70635f31:636f72655f636f6e7461696e6572:66616c7365:00:00
70726f6a656374:69705f636f72655f636f6e7461696e65725c6178695f70726f746f636f6c5f636f6e7665727465725f76325f315f365c64657369676e5f315f6175746f5f70635f32:636f72655f636f6e7461696e6572:66616c7365:00:00
70726f6a656374:69705f636f72655f636f6e7461696e65725c6178695f6477696474685f636f6e7665727465725f76325f315f365c64657369676e5f315f6175746f5f75735f30:636f72655f636f6e7461696e6572:66616c7365:00:00
70726f6a656374:69705f636f72655f636f6e7461696e65725c6178695f6669666f5f6d6d5f735f76345f315f335c64657369676e5f315f6178695f6669666f5f6d6d5f735f305f30:636f72655f636f6e7461696e6572:66616c7365:00:00
70726f6a656374:69705f636f72655f636f6e7461696e65725c6178695f6669666f5f6d6d5f735f76345f315f335c64657369676e5f315f6178695f6669666f5f6d6d5f735f315f30:636f72655f636f6e7461696e6572:66616c7365:00:00
70726f6a656374:69705f636f72655f636f6e7461696e65725c6178695f696e746572636f6e6e6563745f76325f315f375c64657369676e5f315f6178695f696e746572636f6e6e6563745f305f30:636f72655f636f6e7461696e6572:66616c7365:00:00
70726f6a656374:69705f636f72655f636f6e7461696e65725c70726f635f7379735f72657365745f76355f305f385c64657369676e5f315f70726f635f7379735f72657365745f305f30:636f72655f636f6e7461696e6572:66616c7365:00:00
70726f6a656374:69705f636f72655f636f6e7461696e65725c70726f63657373696e675f73797374656d375f76355f355f335c64657369676e5f315f70726f63657373696e675f73797374656d375f305f30:636f72655f636f6e7461696e6572:66616c7365:00:00
70726f6a656374:69705f636f72655f636f6e7461696e65725c7465737449505f76315f305f313631313135303135315c64657369676e5f315f7465737449505f305f30:636f72655f636f6e7461696e6572:66616c7365:00:00
70726f6a656374:69705f636f72655f636f6e7461696e65725c6178695f63726f73736261725f76325f315f375c64657369676e5f315f786261725f30:636f72655f636f6e7461696e6572:66616c7365:00:00
5f5f48494444454e5f5f:5f5f48494444454e5f5f:50726f6a65637455554944:6332316463626564333236383436363762393532326631653939326635383531:506172656e742050412070726f6a656374204944:00
eof:26317331
fifo64_test_2/fifo64_test.runs/impl_1/rundef.js 0 → 100644
//
// Vivado(TM)
// rundef.js: a Vivado-generated Runs Script for WSH 5.1/5.6
// Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
//
var WshShell = new ActiveXObject( "WScript.Shell" );
var ProcEnv = WshShell.Environment( "Process" );
var PathVal = ProcEnv("PATH");
if ( PathVal.length == 0 ) {
PathVal = "D:/Xilinx/SDK/2015.3/bin;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/bin/nt64;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/lib/nt64;D:/Xilinx/Vivado/2015.3/bin;";
} else {
PathVal = "D:/Xilinx/SDK/2015.3/bin;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/bin/nt64;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/lib/nt64;D:/Xilinx/Vivado/2015.3/bin;" + PathVal;
}
ProcEnv("PATH") = PathVal;
var RDScrFP = WScript.ScriptFullName;
var RDScrN = WScript.ScriptName;
var RDScrDir = RDScrFP.substr( 0, RDScrFP.length - RDScrN.length - 1 );
var ISEJScriptLib = RDScrDir + "/ISEWrap.js";
eval( EAInclude(ISEJScriptLib) );
// pre-commands:
ISETouchFile( "init_design", "begin" );
ISEStep( "vivado",
"-log design_1_wrapper.vdi -applog -m64 -messageDb vivado.pb -mode batch -source design_1_wrapper.tcl -notrace" );
function EAInclude( EAInclFilename ) {
var EAFso = new ActiveXObject( "Scripting.FileSystemObject" );
var EAInclFile = EAFso.OpenTextFile( EAInclFilename );
var EAIFContents = EAInclFile.ReadAll();
EAInclFile.Close();
return EAIFContents;
}
fifo64_test_2/fifo64_test.runs/impl_1/runme.bat 0 → 100644
@echo off
rem Vivado (TM)
rem runme.bat: a Vivado-generated Script
rem Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
set HD_SDIR=%~dp0
cd /d "%HD_SDIR%"
cscript /nologo /E:JScript "%HD_SDIR%\rundef.js" %*
fifo64_test_2/fifo64_test.runs/impl_1/runme.log 0 → 100644
This diff could not be displayed because it is too large.
fifo64_test_2/fifo64_test.runs/impl_1/runme.sh 0 → 100644
#!/bin/sh
#
# Vivado(TM)
# runme.sh: a Vivado-generated Runs Script for UNIX
# Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
#
echo "This script was generated under a different operating system."
echo "Please update the PATH and LD_LIBRARY_PATH variables below, before executing this script"
exit
if [ -z "$PATH" ]; then
PATH=D:/Xilinx/SDK/2015.3/bin;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/bin/nt64;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/lib/nt64:D:/Xilinx/Vivado/2015.3/bin
else
PATH=D:/Xilinx/SDK/2015.3/bin;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/bin/nt64;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/lib/nt64:D:/Xilinx/Vivado/2015.3/bin:$PATH
fi
export PATH
if [ -z "$LD_LIBRARY_PATH" ]; then
LD_LIBRARY_PATH=
else
LD_LIBRARY_PATH=:$LD_LIBRARY_PATH
fi
export LD_LIBRARY_PATH
HD_PWD=C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1
cd "$HD_PWD"
HD_LOG=runme.log
/bin/touch $HD_LOG
ISEStep="./ISEWrap.sh"
EAStep()
{
$ISEStep $HD_LOG "$@" >> $HD_LOG 2>&1
if [ $? -ne 0 ]
then
exit
fi
}
# pre-commands:
/bin/touch .init_design.begin.rst
EAStep vivado -log design_1_wrapper.vdi -applog -m64 -messageDb vivado.pb -mode batch -source design_1_wrapper.tcl -notrace
fifo64_test_2/fifo64_test.runs/impl_1/vivado.jou 0 → 100644
#-----------------------------------------------------------
# Vivado v2015.3 (64-bit)
# SW Build 1368829 on Mon Sep 28 20:06:43 MDT 2015
# IP Build 1367837 on Mon Sep 28 08:56:14 MDT 2015
# Start of session at: Tue Nov 15 02:02:53 2016
# Process ID: 556
# Current directory: C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1
# Command line: vivado.exe -log design_1_wrapper.vdi -applog -messageDb vivado.pb -mode batch -source design_1_wrapper.tcl -notrace
# Log file: C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1/design_1_wrapper.vdi
# Journal file: C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/impl_1\vivado.jou
#-----------------------------------------------------------
source design_1_wrapper.tcl -notrace
fifo64_test_2/fifo64_test.runs/synth_1/.vivado.begin.rst 0 → 100644
<?xml version="1.0"?>
<ProcessHandle Version="1" Minor="0">
<Process Command="vivado.bat" Owner="billy" Host="BILLY-PC" Pid="884">
</Process>
</ProcessHandle>
fifo64_test_2/fifo64_test.runs/synth_1/ISEWrap.js 0 → 100644
//
// Vivado(TM)
// ISEWrap.js: Vivado Runs Script for WSH 5.1/5.6
// Copyright 1986-1999, 2001-2013,2015 Xilinx, Inc. All Rights Reserved.
//
// GLOBAL VARIABLES
var ISEShell = new ActiveXObject( "WScript.Shell" );
var ISEFileSys = new ActiveXObject( "Scripting.FileSystemObject" );
var ISERunDir = "";
var ISELogFile = "runme.log";
var ISELogFileStr = null;
var ISELogEcho = true;
var ISEOldVersionWSH = false;
// BOOTSTRAP
ISEInit();
//
// ISE FUNCTIONS
//
function ISEInit() {
// 1. RUN DIR setup
var ISEScrFP = WScript.ScriptFullName;
var ISEScrN = WScript.ScriptName;
ISERunDir =
ISEScrFP.substr( 0, ISEScrFP.length - ISEScrN.length - 1 );
// 2. LOG file setup
ISELogFileStr = ISEOpenFile( ISELogFile );
// 3. LOG echo?
var ISEScriptArgs = WScript.Arguments;
for ( var loopi=0; loopi<ISEScriptArgs.length; loopi++ ) {
if ( ISEScriptArgs(loopi) == "-quiet" ) {
ISELogEcho = false;
break;
}
}
// 4. WSH version check
var ISEOptimalVersionWSH = 5.6;
var ISECurrentVersionWSH = WScript.Version;
if ( ISECurrentVersionWSH < ISEOptimalVersionWSH ) {
ISEStdErr( "" );
ISEStdErr( "Warning: ExploreAhead works best with Microsoft WSH " +
ISEOptimalVersionWSH + " or higher. Downloads" );
ISEStdErr( " for upgrading your Windows Scripting Host can be found here: " );
ISEStdErr( " http://msdn.microsoft.com/downloads/list/webdev.asp" );
ISEStdErr( "" );
ISEOldVersionWSH = true;
}
}
function ISEStep( ISEProg, ISEArgs ) {
// CHECK for a STOP FILE
if ( ISEFileSys.FileExists(ISERunDir + "/.stop.rst") ) {
ISEStdErr( "" );
ISEStdErr( "*** Halting run - EA reset detected ***" );
ISEStdErr( "" );
WScript.Quit( 1 );
}
// WRITE STEP HEADER to LOG
ISEStdOut( "" );
ISEStdOut( "*** Running " + ISEProg );
ISEStdOut( " with args " + ISEArgs );
ISEStdOut( "" );
// LAUNCH!
var ISEExitCode = ISEExec( ISEProg, ISEArgs );
if ( ISEExitCode != 0 ) {
WScript.Quit( ISEExitCode );
}
}
function ISEExec( ISEProg, ISEArgs ) {
var ISEStep = ISEProg;
if (ISEProg == "realTimeFpga" || ISEProg == "planAhead" || ISEProg == "vivado") {
ISEProg += ".bat";
}
var ISECmdLine = ISEProg + " " + ISEArgs;
var ISEExitCode = 1;
if ( ISEOldVersionWSH ) { // WSH 5.1
// BEGIN file creation
ISETouchFile( ISEStep, "begin" );
// LAUNCH!
ISELogFileStr.Close();
ISECmdLine =
"%comspec% /c " + ISECmdLine + " >> " + ISELogFile + " 2>&1";
ISEExitCode = ISEShell.Run( ISECmdLine, 0, true );
ISELogFileStr = ISEOpenFile( ISELogFile );
} else { // WSH 5.6
// LAUNCH!
ISEShell.CurrentDirectory = ISERunDir;
// Redirect STDERR to STDOUT
ISECmdLine = "%comspec% /c " + ISECmdLine + " 2>&1";
var ISEProcess = ISEShell.Exec( ISECmdLine );
// BEGIN file creation
var ISENetwork = WScript.CreateObject( "WScript.Network" );
var ISEHost = ISENetwork.ComputerName;
var ISEUser = ISENetwork.UserName;
var ISEPid = ISEProcess.ProcessID;
var ISEBeginFile = ISEOpenFile( "." + ISEStep + ".begin.rst" );
ISEBeginFile.WriteLine( "<?xml version=\"1.0\"?>" );
ISEBeginFile.WriteLine( "<ProcessHandle Version=\"1\" Minor=\"0\">" );
ISEBeginFile.WriteLine( " <Process Command=\"" + ISEProg +
"\" Owner=\"" + ISEUser +
"\" Host=\"" + ISEHost +
"\" Pid=\"" + ISEPid +
"\">" );
ISEBeginFile.WriteLine( " </Process>" );
ISEBeginFile.WriteLine( "</ProcessHandle>" );
ISEBeginFile.Close();
var ISEOutStr = ISEProcess.StdOut;
var ISEErrStr = ISEProcess.StdErr;
// WAIT for ISEStep to finish
while ( ISEProcess.Status == 0 ) {
// dump stdout then stderr - feels a little arbitrary
while ( !ISEOutStr.AtEndOfStream ) {
ISEStdOut( ISEOutStr.ReadLine() );
}
WScript.Sleep( 100 );
}
ISEExitCode = ISEProcess.ExitCode;
}
ISELogFileStr.Close();
// END/ERROR file creation
if ( ISEExitCode != 0 ) {
ISETouchFile( ISEStep, "error" );
} else {
ISETouchFile( ISEStep, "end" );
}
return ISEExitCode;
}
//
// UTILITIES
//
function ISEStdOut( ISELine ) {
ISELogFileStr.WriteLine( ISELine );
if ( ISELogEcho ) {
WScript.StdOut.WriteLine( ISELine );
}
}
function ISEStdErr( ISELine ) {
ISELogFileStr.WriteLine( ISELine );
if ( ISELogEcho ) {
WScript.StdErr.WriteLine( ISELine );
}
}
function ISETouchFile( ISERoot, ISEStatus ) {
var ISETFile =
ISEOpenFile( "." + ISERoot + "." + ISEStatus + ".rst" );
ISETFile.Close();
}
function ISEOpenFile( ISEFilename ) {
// This function has been updated to deal with a problem seen in CR #870871.
// In that case the user runs a script that runs impl_1, and then turns around
// and runs impl_1 -to_step write_bitstream. That second run takes place in
// the same directory, which means we may hit some of the same files, and in
// particular, we will open the runme.log file. Even though this script closes
// the file (now), we see cases where a subsequent attempt to open the file
// fails. Perhaps the OS is slow to release the lock, or the disk comes into
// play? In any case, we try to work around this by first waiting if the file
// is already there for an arbitrary 5 seconds. Then we use a try-catch block
// and try to open the file 10 times with a one second delay after each attempt.
// Again, 10 is arbitrary. But these seem to stop the hang in CR #870871.
// If there is an unrecognized exception when trying to open the file, we output
// an error message and write details to an exception.log file.
var ISEFullPath = ISERunDir + "/" + ISEFilename;
if (ISEFileSys.FileExists(ISEFullPath)) {
// File is already there. This could be a problem. Wait in case it is still in use.
WScript.Sleep(5000);
}
var i;
for (i = 0; i < 10; ++i) {
try {
return ISEFileSys.OpenTextFile(ISEFullPath, 8, true);
} catch (exception) {
var error_code = exception.number & 0xFFFF; // The other bits are a facility code.
if (error_code == 52) { // 52 is bad file name or number.
// Wait a second and try again.
WScript.Sleep(1000);
continue;
} else {
WScript.StdErr.WriteLine("ERROR: Exception caught trying to open file " + ISEFullPath);
var exceptionFilePath = ISERunDir + "/exception.log";
if (!ISEFileSys.FileExists(exceptionFilePath)) {
WScript.StdErr.WriteLine("See file " + exceptionFilePath + " for details.");
var exceptionFile = ISEFileSys.OpenTextFile(exceptionFilePath, 8, true);
exceptionFile.WriteLine("ERROR: Exception caught trying to open file " + ISEFullPath);
exceptionFile.WriteLine("\tException name: " + exception.name);
exceptionFile.WriteLine("\tException error code: " + error_code);
exceptionFile.WriteLine("\tException message: " + exception.message);
exceptionFile.Close();
}
throw exception;
}
}
}
// If we reached this point, we failed to open the file after 10 attempts.
// We need to error out.
WScript.StdErr.WriteLine("ERROR: Failed to open file " + ISEFullPath);
WScript.Quit(1);
}
fifo64_test_2/fifo64_test.runs/synth_1/ISEWrap.sh 0 → 100644
#!/bin/sh
#
# Vivado(TM)
# ISEWrap.sh: Vivado Runs Script for UNIX
# Copyright 1986-1999, 2001-2013 Xilinx, Inc. All Rights Reserved.
#
HD_LOG=$1
shift
# CHECK for a STOP FILE
if [ -f .stop.rst ]
then
echo "" >> $HD_LOG
echo "*** Halting run - EA reset detected ***" >> $HD_LOG
echo "" >> $HD_LOG
exit 1
fi
ISE_STEP=$1
shift
# WRITE STEP HEADER to LOG
echo "" >> $HD_LOG
echo "*** Running $ISE_STEP" >> $HD_LOG
echo " with args $@" >> $HD_LOG
echo "" >> $HD_LOG
# LAUNCH!
$ISE_STEP "$@" >> $HD_LOG 2>&1 &
# BEGIN file creation
ISE_PID=$!
if [ X != X$HOSTNAME ]
then
ISE_HOST=$HOSTNAME #bash
else
ISE_HOST=$HOST #csh
fi
ISE_USER=$USER
ISE_BEGINFILE=.$ISE_STEP.begin.rst
/bin/touch $ISE_BEGINFILE
echo "<?xml version=\"1.0\"?>" >> $ISE_BEGINFILE
echo "<ProcessHandle Version=\"1\" Minor=\"0\">" >> $ISE_BEGINFILE
echo " <Process Command=\"$ISE_STEP\" Owner=\"$ISE_USER\" Host=\"$ISE_HOST\" Pid=\"$ISE_PID\">" >> $ISE_BEGINFILE
echo " </Process>" >> $ISE_BEGINFILE
echo "</ProcessHandle>" >> $ISE_BEGINFILE
# WAIT for ISEStep to finish
wait $ISE_PID
# END/ERROR file creation
RETVAL=$?
if [ $RETVAL -eq 0 ]
then
/bin/touch .$ISE_STEP.end.rst
else
/bin/touch .$ISE_STEP.error.rst
fi
exit $RETVAL
fifo64_test_2/fifo64_test.runs/synth_1/design_1_wrapper.tcl 0 → 100644
#
# Synthesis run script generated by Vivado
#
set_msg_config -id {HDL 9-1061} -limit 100000
set_msg_config -id {HDL 9-1654} -limit 100000
create_project -in_memory -part xc7z020clg484-1
set_param project.compositeFile.enableAutoGeneration 0
set_param synth.vivado.isSynthRun true
set_msg_config -id {IP_Flow 19-2162} -severity warning -new_severity info
set_property webtalk.parent_dir C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.cache/wt [current_project]
set_property parent.project_path C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.xpr [current_project]
set_property default_lib xil_defaultlib [current_project]
set_property target_language Verilog [current_project]
set_property board_part em.avnet.com:zed:part0:1.3 [current_project]
set_property ip_repo_paths {
c:/Users/billy/Documents/FifoTest/test1
c:/Users/billy/Documents/NetworkInterface/ni_RxMsgController
c:/Users/billy/Documents/NetworkInterface/ni_TxMsgController
} [current_project]
set_property vhdl_version vhdl_2k [current_fileset]
add_files C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/design_1.bd
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_proc_sys_reset_0_0/design_1_proc_sys_reset_0_0_board.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_proc_sys_reset_0_0/design_1_proc_sys_reset_0_0.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_proc_sys_reset_0_0/design_1_proc_sys_reset_0_0_ooc.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_xbar_0/design_1_xbar_0_ooc.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_axi_fifo_mm_s_0_0/design_1_axi_fifo_mm_s_0_0_ooc.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_axi_fifo_mm_s_1_0/design_1_axi_fifo_mm_s_1_0_ooc.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ipshared/xilinx.com/testip_v1_0/constraints/testIP_ooc.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_ds_0/design_1_auto_ds_0_ooc.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_ds_0/design_1_auto_ds_0_clocks.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_pc_0/design_1_auto_pc_0_ooc.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_ds_1/design_1_auto_ds_1_ooc.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_ds_1/design_1_auto_ds_1_clocks.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_pc_1/design_1_auto_pc_1_ooc.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_pc_2/design_1_auto_pc_2_ooc.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_us_0/design_1_auto_us_0_ooc.xdc]
set_property used_in_implementation false [get_files -all c:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/ip/design_1_auto_us_0/design_1_auto_us_0_clocks.xdc]
set_property used_in_implementation false [get_files -all C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/design_1_ooc.xdc]
set_property is_locked true [get_files C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/design_1.bd]
read_verilog -library xil_defaultlib C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.v
read_xdc dont_touch.xdc
set_property used_in_implementation false [get_files dont_touch.xdc]
synth_design -top design_1_wrapper -part xc7z020clg484-1
write_checkpoint -noxdef design_1_wrapper.dcp
catch { report_utilization -file design_1_wrapper_utilization_synth.rpt -pb design_1_wrapper_utilization_synth.pb }
fifo64_test_2/fifo64_test.runs/synth_1/design_1_wrapper.vds 0 → 100644
This diff could not be displayed because it is too large.
fifo64_test_2/fifo64_test.runs/synth_1/design_1_wrapper_utilization_synth.rpt 0 → 100644
Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
---------------------------------------------------------------------------------------------------------------------------
| Tool Version : Vivado v.2015.3 (win64) Build 1368829 Mon Sep 28 20:06:43 MDT 2015
| Date : Tue Nov 15 02:02:47 2016
| Host : billy-PC running 64-bit Service Pack 1 (build 7601)
| Command : report_utilization -file design_1_wrapper_utilization_synth.rpt -pb design_1_wrapper_utilization_synth.pb
| Design : design_1_wrapper
| Device : 7z020clg484-1
| Design State : Synthesized
---------------------------------------------------------------------------------------------------------------------------
Utilization Design Information
Table of Contents
-----------------
1. Slice Logic
1.1 Summary of Registers by Type
2. Memory
3. DSP
4. IO and GT Specific
5. Clocking
6. Specific Feature
7. Primitives
8. Black Boxes
9. Instantiated Netlists
1. Slice Logic
--------------
+----------------------------+------+-------+-----------+-------+
| Site Type | Used | Fixed | Available | Util% |
+----------------------------+------+-------+-----------+-------+
| Slice LUTs* | 4111 | 0 | 53200 | 7.73 |
| LUT as Logic | 3777 | 0 | 53200 | 7.10 |
| LUT as Memory | 334 | 0 | 17400 | 1.92 |
| LUT as Distributed RAM | 160 | 0 | | |
| LUT as Shift Register | 174 | 0 | | |
| Slice Registers | 4941 | 0 | 106400 | 4.64 |
| Register as Flip Flop | 4941 | 0 | 106400 | 4.64 |
| Register as Latch | 0 | 0 | 106400 | 0.00 |
| F7 Muxes | 70 | 0 | 26600 | 0.26 |
| F8 Muxes | 0 | 0 | 13300 | 0.00 |
+----------------------------+------+-------+-----------+-------+
* Warning! The Final LUT count, after physical optimizations and full implementation, is typically lower. Run opt_design after synthesis, if not already completed, for a more realistic count.
1.1 Summary of Registers by Type
--------------------------------
+-------+--------------+-------------+--------------+
| Total | Clock Enable | Synchronous | Asynchronous |
+-------+--------------+-------------+--------------+
| 0 | _ | - | - |
| 0 | _ | - | Set |
| 0 | _ | - | Reset |
| 0 | _ | Set | - |
| 0 | _ | Reset | - |
| 0 | Yes | - | - |
| 204 | Yes | - | Set |
| 304 | Yes | - | Reset |
| 124 | Yes | Set | - |
| 4309 | Yes | Reset | - |
+-------+--------------+-------------+--------------+
2. Memory
---------
+-------------------+------+-------+-----------+-------+
| Site Type | Used | Fixed | Available | Util% |
+-------------------+------+-------+-----------+-------+
| Block RAM Tile | 2.5 | 0 | 140 | 1.79 |
| RAMB36/FIFO* | 2 | 0 | 140 | 1.43 |
| RAMB36E1 only | 2 | | | |
| RAMB18 | 1 | 0 | 280 | 0.36 |
| RAMB18E1 only | 1 | | | |
+-------------------+------+-------+-----------+-------+
* Note: Each Block RAM Tile only has one FIFO logic available and therefore can accommodate only one FIFO36E1 or one FIFO18E1. However, if a FIFO18E1 occupies a Block RAM Tile, that tile can still accommodate a RAMB18E1
3. DSP
------
+-----------+------+-------+-----------+-------+
| Site Type | Used | Fixed | Available | Util% |
+-----------+------+-------+-----------+-------+
| DSPs | 0 | 0 | 220 | 0.00 |
+-----------+------+-------+-----------+-------+
4. IO and GT Specific
---------------------
+-----------------------------+------+-------+-----------+--------+
| Site Type | Used | Fixed | Available | Util% |
+-----------------------------+------+-------+-----------+--------+
| Bonded IOB | 0 | 0 | 200 | 0.00 |
| Bonded IPADs | 0 | 0 | 2 | 0.00 |
| Bonded IOPADs | 130 | 0 | 130 | 100.00 |
| PHY_CONTROL | 0 | 0 | 4 | 0.00 |
| PHASER_REF | 0 | 0 | 4 | 0.00 |
| OUT_FIFO | 0 | 0 | 16 | 0.00 |
| IN_FIFO | 0 | 0 | 16 | 0.00 |
| IDELAYCTRL | 0 | 0 | 4 | 0.00 |
| IBUFGDS | 0 | 0 | 192 | 0.00 |
| PHASER_OUT/PHASER_OUT_PHY | 0 | 0 | 16 | 0.00 |
| PHASER_IN/PHASER_IN_PHY | 0 | 0 | 16 | 0.00 |
| IDELAYE2/IDELAYE2_FINEDELAY | 0 | 0 | 200 | 0.00 |
| ILOGIC | 0 | 0 | 200 | 0.00 |
| OLOGIC | 0 | 0 | 200 | 0.00 |
+-----------------------------+------+-------+-----------+--------+
5. Clocking
-----------
+------------+------+-------+-----------+-------+
| Site Type | Used | Fixed | Available | Util% |
+------------+------+-------+-----------+-------+
| BUFGCTRL | 1 | 0 | 32 | 3.13 |
| BUFIO | 0 | 0 | 16 | 0.00 |
| MMCME2_ADV | 0 | 0 | 4 | 0.00 |
| PLLE2_ADV | 0 | 0 | 4 | 0.00 |
| BUFMRCE | 0 | 0 | 8 | 0.00 |
| BUFHCE | 0 | 0 | 72 | 0.00 |
| BUFR | 0 | 0 | 16 | 0.00 |
+------------+------+-------+-----------+-------+
6. Specific Feature
-------------------
+-------------+------+-------+-----------+-------+
| Site Type | Used | Fixed | Available | Util% |
+-------------+------+-------+-----------+-------+
| BSCANE2 | 0 | 0 | 4 | 0.00 |
| CAPTUREE2 | 0 | 0 | 1 | 0.00 |
| DNA_PORT | 0 | 0 | 1 | 0.00 |
| EFUSE_USR | 0 | 0 | 1 | 0.00 |
| FRAME_ECCE2 | 0 | 0 | 1 | 0.00 |
| ICAPE2 | 0 | 0 | 2 | 0.00 |
| STARTUPE2 | 0 | 0 | 1 | 0.00 |
| XADC | 0 | 0 | 1 | 0.00 |
+-------------+------+-------+-----------+-------+
7. Primitives
-------------
+----------+------+----------------------+
| Ref Name | Used | Functional Category |
+----------+------+----------------------+
| FDRE | 4309 | Flop & Latch |
| LUT6 | 1387 | LUT |
| LUT3 | 1234 | LUT |
| LUT4 | 688 | LUT |
| LUT5 | 673 | LUT |
| LUT2 | 403 | LUT |
| LUT1 | 389 | LUT |
| FDCE | 304 | Flop & Latch |
| FDPE | 204 | Flop & Latch |
| CARRY4 | 151 | CarryLogic |
| SRLC32E | 150 | Distributed Memory |
| RAMD32 | 144 | Distributed Memory |
| BIBUF | 130 | IO |
| FDSE | 124 | Flop & Latch |
| MUXF7 | 70 | MuxFx |
| RAMD64E | 64 | Distributed Memory |
| RAMS32 | 48 | Distributed Memory |
| SRL16E | 24 | Distributed Memory |
| RAMB36E1 | 2 | Block Memory |
| RAMB18E1 | 1 | Block Memory |
| PS7 | 1 | Specialized Resource |
| BUFG | 1 | Clock |
+----------+------+----------------------+
8. Black Boxes
--------------
+----------+------+
| Ref Name | Used |
+----------+------+
9. Instantiated Netlists
------------------------
+----------+------+
| Ref Name | Used |
+----------+------+
fifo64_test_2/fifo64_test.runs/synth_1/dont_touch.xdc 0 → 100644
# This file is automatically generated.
# It contains project source information necessary for synthesis and implementation.
# Block Designs: bd/design_1/design_1.bd
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1 || ORIG_REF_NAME==design_1}]
# IP: bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_processing_system7_0_0 || ORIG_REF_NAME==design_1_processing_system7_0_0}]
# IP: bd/design_1/ip/design_1_proc_sys_reset_0_0/design_1_proc_sys_reset_0_0.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_proc_sys_reset_0_0 || ORIG_REF_NAME==design_1_proc_sys_reset_0_0}]
# IP: bd/design_1/ip/design_1_axi_interconnect_0_0/design_1_axi_interconnect_0_0.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_axi_interconnect_0_0 || ORIG_REF_NAME==design_1_axi_interconnect_0_0}]
# IP: bd/design_1/ip/design_1_xbar_0/design_1_xbar_0.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_xbar_0 || ORIG_REF_NAME==design_1_xbar_0}]
# IP: bd/design_1/ip/design_1_axi_fifo_mm_s_0_0/design_1_axi_fifo_mm_s_0_0.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_axi_fifo_mm_s_0_0 || ORIG_REF_NAME==design_1_axi_fifo_mm_s_0_0}]
# IP: bd/design_1/ip/design_1_axi_fifo_mm_s_1_0/design_1_axi_fifo_mm_s_1_0.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_axi_fifo_mm_s_1_0 || ORIG_REF_NAME==design_1_axi_fifo_mm_s_1_0}]
# IP: bd/design_1/ip/design_1_testIP_0_0/design_1_testIP_0_0.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_testIP_0_0 || ORIG_REF_NAME==design_1_testIP_0_0}]
# IP: bd/design_1/ip/design_1_auto_ds_0/design_1_auto_ds_0.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_auto_ds_0 || ORIG_REF_NAME==design_1_auto_ds_0}]
# IP: bd/design_1/ip/design_1_auto_pc_0/design_1_auto_pc_0.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_auto_pc_0 || ORIG_REF_NAME==design_1_auto_pc_0}]
# IP: bd/design_1/ip/design_1_auto_ds_1/design_1_auto_ds_1.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_auto_ds_1 || ORIG_REF_NAME==design_1_auto_ds_1}]
# IP: bd/design_1/ip/design_1_auto_pc_1/design_1_auto_pc_1.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_auto_pc_1 || ORIG_REF_NAME==design_1_auto_pc_1}]
# IP: bd/design_1/ip/design_1_auto_pc_2/design_1_auto_pc_2.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_auto_pc_2 || ORIG_REF_NAME==design_1_auto_pc_2}]
# IP: bd/design_1/ip/design_1_auto_us_0/design_1_auto_us_0.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_auto_us_0 || ORIG_REF_NAME==design_1_auto_us_0}]
# XDC: bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0.xdc
set_property DONT_TOUCH TRUE [get_cells [split [join [get_cells -hier -filter {REF_NAME==design_1_processing_system7_0_0 || ORIG_REF_NAME==design_1_processing_system7_0_0}] {/inst }]/inst ]]
# XDC: bd/design_1/ip/design_1_proc_sys_reset_0_0/design_1_proc_sys_reset_0_0_board.xdc
#dup# set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_proc_sys_reset_0_0 || ORIG_REF_NAME==design_1_proc_sys_reset_0_0}]
# XDC: bd/design_1/ip/design_1_proc_sys_reset_0_0/design_1_proc_sys_reset_0_0.xdc
#dup# set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==design_1_proc_sys_reset_0_0 || ORIG_REF_NAME==design_1_proc_sys_reset_0_0}]
# XDC: bd/design_1/ip/design_1_proc_sys_reset_0_0/design_1_proc_sys_reset_0_0_ooc.xdc
# XDC: bd/design_1/ip/design_1_xbar_0/design_1_xbar_0_ooc.xdc
# XDC: bd/design_1/ip/design_1_axi_fifo_mm_s_0_0/design_1_axi_fifo_mm_s_0_0_ooc.xdc
# XDC: bd/design_1/ip/design_1_axi_fifo_mm_s_1_0/design_1_axi_fifo_mm_s_1_0_ooc.xdc
# XDC: bd/design_1/ipshared/xilinx.com/testip_v1_0/constraints/testIP_ooc.xdc
# XDC: bd/design_1/ip/design_1_auto_ds_0/design_1_auto_ds_0_ooc.xdc
# XDC: bd/design_1/ip/design_1_auto_ds_0/design_1_auto_ds_0_clocks.xdc
set_property DONT_TOUCH TRUE [get_cells [split [join [get_cells -hier -filter {REF_NAME==design_1_auto_ds_0 || ORIG_REF_NAME==design_1_auto_ds_0}] {/inst }]/inst ]]
# XDC: bd/design_1/ip/design_1_auto_pc_0/design_1_auto_pc_0_ooc.xdc
# XDC: bd/design_1/ip/design_1_auto_ds_1/design_1_auto_ds_1_ooc.xdc
# XDC: bd/design_1/ip/design_1_auto_ds_1/design_1_auto_ds_1_clocks.xdc
set_property DONT_TOUCH TRUE [get_cells [split [join [get_cells -hier -filter {REF_NAME==design_1_auto_ds_1 || ORIG_REF_NAME==design_1_auto_ds_1}] {/inst }]/inst ]]
# XDC: bd/design_1/ip/design_1_auto_pc_1/design_1_auto_pc_1_ooc.xdc
# XDC: bd/design_1/ip/design_1_auto_pc_2/design_1_auto_pc_2_ooc.xdc
# XDC: bd/design_1/ip/design_1_auto_us_0/design_1_auto_us_0_ooc.xdc
# XDC: bd/design_1/ip/design_1_auto_us_0/design_1_auto_us_0_clocks.xdc
set_property DONT_TOUCH TRUE [get_cells [split [join [get_cells -hier -filter {REF_NAME==design_1_auto_us_0 || ORIG_REF_NAME==design_1_auto_us_0}] {/inst }]/inst ]]
# XDC: bd/design_1/design_1_ooc.xdc
fifo64_test_2/fifo64_test.runs/synth_1/fsm_encoding.os 0 → 100644
add_fsm_encoding \
{axi_data_fifo_v2_1_5_axic_reg_srl_fifo.state} \
{ } \
{{00 0100} {01 1000} {10 0001} {11 0010} }
fifo64_test_2/fifo64_test.runs/synth_1/gen_run.xml 0 → 100644
<?xml version="1.0" encoding="UTF-8"?>
<GenRun Id="synth_1" LaunchPart="xc7z020clg484-1" LaunchTime="1479167805">
<File Type="RDS-DCP" Name="design_1_wrapper.dcp"/>
<File Type="RUN-CONSTRS" Name="$PDATADIR/runs/synth_1/constrs_in.xml"/>
<File Type="RDS-UTIL-PB" Name="design_1_wrapper_utilization_synth.pb"/>
<File Type="RUN-SRCS" Name="$PDATADIR/runs/synth_1/sources.xml"/>
<File Type="RDS-PROPCONSTRS" Name="design_1_wrapper_drc_synth.rpt"/>
<File Type="PA-TCL" Name="design_1_wrapper.tcl"/>
<File Type="RUN-STRAT" Name="$PDATADIR/runs/synth_1/synth_1.psg"/>
<File Type="RDS-RDS" Name="design_1_wrapper.vds"/>
<File Type="RDS-UTIL" Name="design_1_wrapper_utilization_synth.rpt"/>
<File Type="VDS-TIMINGSUMMARY" Name="design_1_wrapper_timing_summary_synth.rpt"/>
<File Type="VDS-TIMING-PB" Name="design_1_wrapper_timing_summary_synth.pb"/>
<FileSet Name="sources" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1">
<Filter Type="Srcs"/>
<File Path="$PSRCDIR/sources_1/bd/design_1/design_1.bd">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/bd/design_1/hdl/design_1_wrapper.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/bd/design_1/ip/design_1_testIP_0_0/design_1_testIP_0_0.upgrade_log"/>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="design_1_wrapper"/>
<Option Name="TopAutoSet" Val="TRUE"/>
</Config>
</FileSet>
<FileSet Name="constrs_in" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1">
<Filter Type="Constrs"/>
<Config>
<Option Name="ConstrsType" Val="XDC"/>
</Config>
</FileSet>
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2015"/>
<Step Id="synth_design"/>
</Strategy>
</GenRun>
fifo64_test_2/fifo64_test.runs/synth_1/htr.txt 0 → 100644
REM
REM Vivado(TM)
REM htr.txt: a Vivado-generated description of how-to-repeat the
REM the basic steps of a run. Note that runme.bat/sh needs
REM to be invoked for Vivado to track run status.
REM Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
REM
vivado -log design_1_wrapper.vds -m64 -mode batch -messageDb vivado.pb -notrace -source design_1_wrapper.tcl
fifo64_test_2/fifo64_test.runs/synth_1/rundef.js 0 → 100644
//
// Vivado(TM)
// rundef.js: a Vivado-generated Runs Script for WSH 5.1/5.6
// Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
//
var WshShell = new ActiveXObject( "WScript.Shell" );
var ProcEnv = WshShell.Environment( "Process" );
var PathVal = ProcEnv("PATH");
if ( PathVal.length == 0 ) {
PathVal = "D:/Xilinx/SDK/2015.3/bin;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/bin/nt64;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/lib/nt64;D:/Xilinx/Vivado/2015.3/bin;";
} else {
PathVal = "D:/Xilinx/SDK/2015.3/bin;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/bin/nt64;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/lib/nt64;D:/Xilinx/Vivado/2015.3/bin;" + PathVal;
}
ProcEnv("PATH") = PathVal;
var RDScrFP = WScript.ScriptFullName;
var RDScrN = WScript.ScriptName;
var RDScrDir = RDScrFP.substr( 0, RDScrFP.length - RDScrN.length - 1 );
var ISEJScriptLib = RDScrDir + "/ISEWrap.js";
eval( EAInclude(ISEJScriptLib) );
ISEStep( "vivado",
"-log design_1_wrapper.vds -m64 -mode batch -messageDb vivado.pb -notrace -source design_1_wrapper.tcl" );
function EAInclude( EAInclFilename ) {
var EAFso = new ActiveXObject( "Scripting.FileSystemObject" );
var EAInclFile = EAFso.OpenTextFile( EAInclFilename );
var EAIFContents = EAInclFile.ReadAll();
EAInclFile.Close();
return EAIFContents;
}
fifo64_test_2/fifo64_test.runs/synth_1/runme.bat 0 → 100644
@echo off
rem Vivado (TM)
rem runme.bat: a Vivado-generated Script
rem Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
set HD_SDIR=%~dp0
cd /d "%HD_SDIR%"
cscript /nologo /E:JScript "%HD_SDIR%\rundef.js" %*
fifo64_test_2/fifo64_test.runs/synth_1/runme.log 0 → 100644
This diff could not be displayed because it is too large.
fifo64_test_2/fifo64_test.runs/synth_1/runme.sh 0 → 100644
#!/bin/sh
#
# Vivado(TM)
# runme.sh: a Vivado-generated Runs Script for UNIX
# Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
#
echo "This script was generated under a different operating system."
echo "Please update the PATH and LD_LIBRARY_PATH variables below, before executing this script"
exit
if [ -z "$PATH" ]; then
PATH=D:/Xilinx/SDK/2015.3/bin;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/bin/nt64;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/lib/nt64:D:/Xilinx/Vivado/2015.3/bin
else
PATH=D:/Xilinx/SDK/2015.3/bin;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/bin/nt64;D:/Xilinx/Vivado/2015.3/ids_lite/ISE/lib/nt64:D:/Xilinx/Vivado/2015.3/bin:$PATH
fi
export PATH
if [ -z "$LD_LIBRARY_PATH" ]; then
LD_LIBRARY_PATH=
else
LD_LIBRARY_PATH=:$LD_LIBRARY_PATH
fi
export LD_LIBRARY_PATH
HD_PWD=C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1
cd "$HD_PWD"
HD_LOG=runme.log
/bin/touch $HD_LOG
ISEStep="./ISEWrap.sh"
EAStep()
{
$ISEStep $HD_LOG "$@" >> $HD_LOG 2>&1
if [ $? -ne 0 ]
then
exit
fi
}
EAStep vivado -log design_1_wrapper.vds -m64 -mode batch -messageDb vivado.pb -notrace -source design_1_wrapper.tcl
fifo64_test_2/fifo64_test.runs/synth_1/vivado.jou 0 → 100644
#-----------------------------------------------------------
# Vivado v2015.3 (64-bit)
# SW Build 1368829 on Mon Sep 28 20:06:43 MDT 2015
# IP Build 1367837 on Mon Sep 28 08:56:14 MDT 2015
# Start of session at: Tue Nov 15 01:56:47 2016
# Process ID: 7772
# Current directory: C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1
# Command line: vivado.exe -log design_1_wrapper.vds -mode batch -messageDb vivado.pb -notrace -source design_1_wrapper.tcl
# Log file: C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1/design_1_wrapper.vds
# Journal file: C:/Users/billy/Documents/FifoTest/fifo64_test/fifo64_test.runs/synth_1\vivado.jou
#-----------------------------------------------------------
source design_1_wrapper.tcl -notrace
fifo64_test_2/fifo64_test.sdk/.metadata/.log 0 → 100644
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fifo64_test_2/fifo64_test.sdk/.metadata/.plugins/com.xilinx.sdk.hw.ui/dialog_settings.xml 0 → 100644
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<item value="design_1_wrapper_hw_platform_0" key="applicationwizard.hw_platform_key"/>
</section>
fifo64_test_2/fifo64_test.sdk/.metadata/.plugins/com.xilinx.sdk.targetmanager.ui/dialog_settings.xml 0 → 100644
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<item value="design_1_wrapper.bit" key="design_1_wrapper_hw_platform_0-bitFile"/>
<item value="Local" key="design_1_wrapper_hw_platform_0-target"/>
<item value="Auto Detect" key="design_1_wrapper_hw_platform_0-device"/>
<item value="design_1_wrapper_hw_platform_0" key="programfpga.hwplatform"/>
<item value="false" key="design_1_wrapper_hw_platform_0-partial_bit"/>
<item value="" key="design_1_wrapper_hw_platform_0-bmmFile"/>
</section>
fifo64_test_2/fifo64_test.sdk/.metadata/.plugins/org.eclipse.cdt.core/.log 0 → 100644
*** SESSION Nov 14, 2016 00:07:08.95 -------------------------------------------
*** SESSION Nov 14, 2016 00:58:45.29 -------------------------------------------
*** SESSION Nov 14, 2016 17:23:11.23 -------------------------------------------
*** SESSION Nov 14, 2016 17:25:34.05 -------------------------------------------
*** SESSION Nov 14, 2016 17:52:33.40 -------------------------------------------
*** SESSION Nov 15, 2016 00:43:57.21 -------------------------------------------
*** SESSION Nov 15, 2016 01:10:44.10 -------------------------------------------
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